Another big box of PCB’s arrived from jlcpcb this week.
In this box are my first add-on designs for the Raspberry Pi RP2040 based PICO module and also the Raspberry Pi 400 computer. So hopefully I will write about these in the next few posts.
As well as the Raspberry Pi stuff there where also some RC2014 boards as well.
It’s been a while since we published any thing new for the RC2014 architecture.
This is a simple combined ROM and RAM card designed to work with the RC2014 bus. This is an experimenters board. There is no fancy memory paging etc., it’s simple memory architecture was designed to be flexible and allow the user to experiment with other CPU architectures on the RC2014 bus. It was originally designed to work with our 8052 CPU.
It features
enhanced RC2014 bus
Selectable memory* options 8K, 16K or 32K
Board can be used as RAM only or ROM only or both.
Options for nMRD/nMWR or nRD/nWR signals
Option for 27C512 with Hi/Lo ROM (A15) select
IC Decoder 74xx138 using A15/A14/A13 (with extra options for A13 & A14)
8 or 16-bit wide data bus**
moveable memory positions (i.e. ROM can be at top or bottom memory space)
A couple of important notes:
* Both ROM and RAM memories must be the same size.
** see explanation below
The option for either nMRD and nMWR (nRD and nWR or’ed with nMREQ) signals or nRD and nWR only signals when IC3 (74xx32) is fitted or not fitted allows for experimenting with other CPU Read/Write architectures.
Notably, the enhanced RC2014 bus features a 16-bit data bus. The card can use this enhancement by allowing the selection of the high or low 8-bit portion of 16-bit data bus. This allows the user to experiment with 16-bit CPU’s such as 68000 or 8086 when two cards are used together.
Also in the box where some new board designs. No new RC2014 PCB’s this time but some boards for the ZX Spectrum and Commodore 64 computers. I’ll share more details of these in the coming days and weeks.
If you’re into making I/O cards for the RC2014 than this enhanced prototype board might be of interest to you.
It features circuitry (see schematic) to for selectable decoding the I/O address and also gates to generate !IORD and !IOWR signals, as well as two spare OR gates.
The IC’s used are:
74LS32 Quad OR gate
74LS688 Octal (8-bit) magnitude comparator
Earlier in the month I got big box of PCB’s for the most recent RC2014 boards I’ve been working on.
In amongst the PCB’s were a couple or three new designs. The first is an enhanced prototyping board. As well as lots of PCB pads for building stuff it also features some decoding logic to make your design a little easier. The other PCB was for a Z80 PIO digital input/output card and the final new PCB was for a minimal chip computer inspired by Grant Searle popular Z80 design but featuring an enhanced RC2014 bus (x3).
It’s been a while since I posted about the 8052 CPU card for RC2014 Bus and heres a update to where i got to with this interesting RC2014 project.
The original 8052’s are still available but originally used UV erasable EPROM or OTP PROM for their program memory. So instead I’ve been using a modern FLASH memory version of the 8052, a AT89C5252 with great success.
The original 8052-BASIC has was good but had a number of software bugs. Fortunately, there had been a number of improvements over the years and the version I’ve been using is V1.31 which can be found here:
8052-BASIC needs a couple of K’s of RAM to operate. For this I’ve been using a standalone 32K-byte SRAM card.
I been using a lot of TTL and CMOS logic gates in my recent RC2014 circuits and after realising that I had loaned out my much used copies of TI’s TTL Logic data books some time again and never got them back so to help me I created this quick comparison table for the common TTL and CMOS logic gates.