RC2014 enhanced prototype board

May 30, 2019

If you’re into making I/O cards for the RC2014 than this enhanced prototype board might be of interest to you.

It features circuitry (see schematic) to for selectable decoding the I/O address and also gates to generate !IORD and !IOWR signals, as well as two spare OR gates.

The IC’s used are:

74LS32 Quad OR gate
74LS688 Octal (8-bit) magnitude comparator

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Big Box of PCB’s

April 29, 2019

Earlier in the month I got big box of PCB’s for the most recent RC2014 boards I’ve been working on.

In amongst the PCB’s were a couple or three new designs. The first is an enhanced prototyping board. As well as lots of PCB pads for building stuff it also features some decoding logic to make your design a little easier. The other PCB was for a Z80 PIO digital input/output card and the final new PCB was for a minimal chip computer inspired by Grant Searle popular Z80 design but featuring an enhanced RC2014 bus (x3).


Z80 SIO2 Dual-UART Card for RC2014 bus (with clock)

February 25, 2019

Following on from last months Z80 CPU module for the RC2014 bus, here is a dual-serial SIO UART board.

So what makes it special?

It will work with either the standard RC2014 bus or the latest enhanced bus where all the Z80 CPU signals are available.

It includes several options for generating a Baud-Rate clock clock: Crystal, Oscillator or taken from RC2014 back plane.

The schematic is here:

and you can find it on Tindie here:


Z80 CPU Card for RC2014 (with clock and reset)

January 21, 2019

This is the Z80 CPU module I demonstrated a few months ago. It is designed to work with the RC2014 bus.

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So what makes it special? Well, the module includes a number of extra features and enhancements designed to simplify a system build. These include:

It will work with either the standard RC2014 bus or the latest enhanced bus where all the Z80 CPU signals are available.

It includes several options for generating a signal clock: Crystal, Oscillator or taken from RC2014 back plane.

A reset circuit is included.

And the signals INT, NMI, BUSRQ and WAIT feature 10K pull-up resistors.

The schematic is here:

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and you can find it on Tindie here:


8052 CPU card for RC2014 Bus part 2

December 31, 2018

It’s been a while since I posted about the 8052 CPU card for RC2014 Bus and heres a update to where i got to with this interesting RC2014 project.

The original 8052’s are still available but originally used UV erasable EPROM or OTP PROM for their program memory. So instead I’ve been using a modern FLASH memory version of the 8052, a AT89C5252 with great success.

The original 8052-BASIC has was good but had a number of software bugs. Fortunately, there had been a number of improvements over the years and the version I’ve been using is V1.31 which can be found here:

8052-BASIC needs a couple of K’s of RAM to operate. For this I’ve been using a standalone 32K-byte SRAM card.


Common TTL and CMOS Logic Gates

November 26, 2018

I been using a lot of TTL and CMOS logic gates in my recent RC2014 circuits and after realising that I had loaned out my much used copies of TI’s TTL Logic data books some time again and never got them back so to help me I created this quick comparison table for the common TTL and CMOS logic gates.

For completeness here’s a logic truth table:


eDay7

October 31, 2018

We were at eDay again earlier in the month (Saturday 6th October 2018) as part of Newcastle Maker Space. This is the seventh year its been going and as usually we had a great time showing off various projects.

We had the following R-Kade and PiZythn and Rc2014 projects on show.

For those who don’t know what eDay is: eDay is a local digital skills day where various digital technologies are demonstrated to an enquiring general public. A sort-of geeky show and tell where local groups and individuals meet at Gateshead Central Library and show off their projects or what interests them.